Jihwan Oh
Ph.D. Student in Electrical Engineering, Stanford University
I work on cross-layer optimization and hardware-software co-design for energy-efficient, high-performance computing systems.
I am starting my Ph.D. in Stanford EE with Prof. Thierry Tambe. Previously, I worked with Prof. Divya Mahajan at Georgia Tech and completed my B.S. at KAIST.
News
Starting the Ph.D. program in Electrical Engineering at Stanford University and joining Prof. Thierry Tambe Lab.
First-author paper accepted to IEEE International Symposium on Workload Characterization (IISWC) 2026.
Selected as a full travel grant recipient for ISCA 2025 and the uArch Workshop in Tokyo.
Presented work on compute-communication overlap at ISPASS 2025 in Ghent.
Research Interests
My research asks how hardware, runtime systems, communication protocols, and ML workloads can be designed together instead of optimized in isolation.
Cross-Layer Systems
Profiling and redesigning the interaction between GPU kernels, communication libraries, runtimes, and hardware resources.
Hardware-Software Co-Design
Building mechanisms that improve performance and energy efficiency across the full computing stack.
Specialized Accelerators
Studying accelerator architectures for data-intensive ML workloads, including PIM and domain-specific execution.
Selected Publications
Compute-Communication Overlap Is Not Free: A Cross-Layer Characterization in GPU LLM Workloads
A cross-layer study of compute-communication overlap overheads in GPU LLM workloads, exposing hardware-level costs that can be hidden at the software layer.
Characterizing Compute-Communication Overlap in GPU-Accelerated Distributed Deep Learning: Performance and Power Implications
Shows that aggressively maximizing overlap in distributed deep learning can degrade both execution time and power efficiency across parallelism configurations.
Experience
Systems Infrastructure and Architecture Research Lab, Georgia Tech
Researcher, advised by Prof. Divya Mahajan
- Characterized compute-communication overlap in large-scale distributed LLM training.
- Led profiling work to identify hardware-level sources of overlap overhead.
- Designed an NCCL cross-layer communication protocol using shared memory as a TMA-driven staging buffer.
Computer Architecture and Systems Lab, KAIST
Undergraduate Researcher, advised by Prof. Jongse Park
- Analyzed LLM inference on NeuPIMs and studied NPU-PIM load imbalance.
- Explored redistribution strategies and quantization techniques for PIM architectures.
Republic of Korea Air Force
Software Developer
- Developed a VR flight-training system with Unreal Engine 4 and C++.
- Presented the simulator as an Air Force representative at a national information and communication development conference.
Education
Stanford University
Ph.D. in Electrical Engineering
KAIST
B.S. in Electrical Engineering
Georgia Institute of Technology
Exchange Program, School of Electrical and Computer Engineering
Honors & Awards
- Next-Generation Engineer Award: Highest Distinction, IPESK, 2025
- uArch Mentoring Workshop Full Travel Grant, uArch @ ISCA 2025
- Student Travel Grant, IEEE ISPASS 2025
- Korea-U.S. Student Exchange Program Scholarship, KIAT, 2024
- National Science and Technology Scholarship, Korea Government, 2021 - 2024
Contact
Open to research conversations around efficient AI systems, architecture, and internship opportunities.